VHDL Implementation of 128 bit Pipelined Blowfish Algorithm

Abstract

Communication through public networks imposes threat to our sensitive data. Information security plays an important role in public networking and wireless communication. In order to achieve the protection of information or private data in networking, Cryptography can be used. It is the automated method in which security goals are accomplished. Cryptographic algorithm is a mathematical function used in Encryption and Decryption process. Blowfish is a keyed symmetric Cryptographic algorithm. It is a very fast and useful scheme for Encryption and Decryption. A key is the strongest point of any algorithm but it can become the weakest point if it is not secured. Our information can be secured if it is encrypted by using multiple keys. Hence implementation of Blowfish algorithm is very much use. Usually blowfish in existing method is 64 bit block cipher and Throughput depends on the size of the blocks applied. In this proposed paper, the blowfish algorithm is designed for 128 bit block size and pipelining operation is carried to improve the speed and reduce the delay accordingly, and so that this architecture improves the throughput of an encoder. The implementation results indicate that the proposed pipelined architecture shows 10% of improvement in Throughput. VHDL Implementation of proposed architecture has done by using XILINX ISE 9.1.