A 3.4 Gbps 27-1 Pseudo Random Bit Sequence generator for Serial-Data Communications in 0.18�m CMOS

Abstract

This paper presents a 3.4 Gbps Pseudo Random Bit Sequence (PRBS) generator with sequence length of 27-1. The circuit uses 7- Bit shift register with a linear current mode XOR gate and current mode D flip-flop and works up to data rates of 3.4 Gbps. The simulated data jitter of the 3.4 Gbps output is 2.75ps with full swing output voltage of 1.8V and the binary-sequence repeats itself after 127 cycles PRBS generator implemented in Cadence 0.18�m CMOS technology.